I'M
Steven
Wong.
Electronics Engineer
EXPERIENCE
Apr 2018 ‒ Sep 2018
Trainee Electronics Engineer
DCA Design International
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Researched cellular IoT modules and designed a user interface to send data to a server via EC-GSM-IoT
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Investigated possible point of failure from CT scans of post drop tested medical devices’ PCB
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Came up with an idea for a low-cost high-volume electric contact valued by project manager
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Reverse-engineered and improved development & manufacturing test tools for medical devices
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Tested and programmed 200 PCBA in a day
Jun 2017 ‒ Jul 2017
Research Assistant
Electrical & Electronic Engineering Department,
Imperial College London
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Research topic: Fast parallel measurements of Memristor arrays
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Measured voltage at nodes and current going in and out of nodes
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Designed circuit and used SPICE simulator to evaluate and improve the circuit
Aug 2016 ‒ Sep 2017
Electronics Engineer
MEDEXO Robotics
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Designed a system to stabilise tremors caused by neurodegeneration disease such as Parkinson’s Disease
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Analysed data and adjusted coefficients to improve efficiency and accuracy of algorithm
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Designed and assembled PCB to fit in limited space without compromise the entire circuit design
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Patient testing, recorded data and took feedback to further improve future prototype
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Assisted on multiple pitching events and won more than £40k funding
EDUCATION
2015 ‒ 2019
MEng Electrical and Electronic Engineering
IMPERIAL COLLEGE LONDON
Awarded the Eric Laithwaite Prize for Outstanding Innovation in the Final Year Individual Project
Final Year: Finance Signal Processing (84%), Adaptive Signal Processing and Machine Intelligence (81%), Pattern Recognition (75%), Analogue Signal Processing (71%)
Third Year: Real-time Digital Signal Processing (77%), Digital System Design (73%), Analogue Integrated Circuit and Systems (72%), Project Management (67%).
Second Year: Introduction to Computer Architecture (75%), Signals and Linear Systems (69%), Overall Coursework: 69.3%
2012 ‒ 2015
GCE A-Level and IGCSEs
CHRISTS HOSPITAL SCHOOL
A-Levels: Mathematics (A*), Further Mathematics (A), Physics (A), Computing (B)​​
SKILLS
MATLAB
C/C++
Python
Altium Designer
Quartus II/Prime
Arduino
Verilog HDL
ARM Assembly
LabView Communication
Altium CircuitMaker
LTspice
STM32
PROJECTS
As the Hong Kong Police Force used an enormous amount of Chinese made tear gas in the recent protest, toxic gas such as hydrogen cyanide (HCN) is being released. Concerns have been raised on its harmful effect on citizens. Due to the expensive cost of HCN gas detectors, I am in collaboration with a group of engineers and scientist in Hong Kong, to design a cheap HCN gas detector for real-time data collection on HCN concentration over Hong Kong.
A 6-Bit Successive Approximation Analogue-to-Digital Converter in 0.18 um CMOS technology with 1.8 V supply, is presented. The ADC design achieved less than 800 uW with both static and dynamic power consumption at 100 kHz sampling frequency with an area of 77.84 um x 190.12 um. The input voltage range is designed to convert analogue signals from 0.4 V to 1.4 V with an average integrated non-linearity (INL) and differential non-linearity (DNL) of 0.305 LSB and 0.073 LSB error.
A face recognition investigation has been conducted using Principle Component Analysis (PCA) for dimensional reduction. Two PCA multi-class classifiers, Nearest Neighbour (NN) and an alternative classifiers using reconstruction error, are explored and compared. Then, Linear Discriminant Analysis (LDA) and ensemble learning is performed the accuracies and computational cost are analysed. 93% accuracy is achieved with PCA-LDA Ensemble face recognition.
The filter was implemented on a DSP6713 chip using Code Composer Studio. The speech enhancement system is implemented based on noise estimation and frequency domain subtraction techniques such as low-pass filter in magnitude domain, over-subtractions.
Aim to measure impedance of DUT over different frequencies to determine if DUT is a series or parallel RC circuit. Auto-ranging is available to provide accurate measurements.
A NIOS II processor is designed with dedicated hardware blocks using Quartus II and Verilog HDL to evaluate a summation of complex trigonometric function. With the use of custom instruction involve hardware floating point artithmetic, CORDIC algorithm, overclock system by 2.4 time from using different arrangement to fit the system on to the FPGA chip and other optimisations. The latency of the evaluation has improved by 99.95% on a Terasic DE0 board.
The prototype on the left hand side is our second year project at Imperial College. The purpose of the Articulated Glove was to aid people with hand weakness caused by neurotrauma injuries through a physical solution that is cost-effective, portable, comfortable and well-designed.
This project aimed at improving my understanding with op-amps. The amplifier implemented on the breadboard has a gain of 86 dB with 3 dB of pass-band ripple.
A BPSK and DPSK system is built via LabView Communication with NI USRP. The aim was to have a better understanding on trade offs and communication systems.